My ICASSP 2010 Schedule
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Paper Detail
Paper: | DISPS-L2.3 |
Session: | Efficient Implementation for Communications |
Session Time: | Friday, March 19, 13:30 - 15:30 |
Presentation Time: | Friday, March 19, 14:10 - 14:30 |
Presentation: |
Lecture
|
Topic: |
Design and Implementation of Signal Processing Systems: Algorithm and architecture co-optimization |
Paper Title: |
PARTIAL-PARALLEL DECODER ARCHITECTURE FOR QUASI-CYCLIC NON-BINARY LDPC CODES |
Authors: |
Xinmiao Zhang; Case Western Reserve University | | |
| Fang Cai; Case Western Reserve University | | |