Tutorial 4: A Systems Approach to Fixed-Point Algorithm Education

Presented by

Wayne T. Padgett, David V. Anderson

Abstract

The topic of fixed–point implementation is addressed only minimally in most U.S. electrical engineering curricula, but demand for this skill continues to increase in industry as embedded implementations and FPGA products often require the low power and cost associated with fixed–point algorithms. Intellectual property and tool vendors face the problem of needing to educate their customers, and the existing treatments of fixed–point issues are inadequate because their focus is on isolated error sources instead of on system performance. This tutorial is designed to introduce attendees to tools and examples of analyzing fixed–point system performance, both in the processor and FPGA environments. The demonstrations will include analyzing a system and identifying the cause of poor performance. Several techniques for adjusting the algorithm will be discussed and demonstrated.

This tutorial is for educators who want to include more fixed–point material in their courses, or who need to improve their understanding of fixed–point issues for their research implementation needs. The tools and demonstrations will provide a framework for successfully teaching or using fixed–point system analysis. Industry attendees who need an overview of fixed–point system analysis will also benefit. Those who need to see the big picture of fixed–point system analysis, and get examples of how to apply it to a simple system should attend.

Speaker Biography

Wayne T. Padgett is an Associate Professor of Electrical and Computer Engineering at Rose-Hulman Institute of Technology. He received his B.E.E degree from Auburn University in 1989, his M.S. and Ph.D. degrees from Georgia Institute of Technology in 1990 and 1994, respectively. Dr. Padgett has an interest in industry collaboration. During his sabbatical with Agere Systems, he participated in the development of efficient signal processing algorithms for a 4 ALU fixed–point processor. He is a member of ASEE, a senior member of IEEE, a member of the IEEE Technical Committee for Signal Processing Education, and he co-chaired the first Signal Processing Education Workshop.

David V. Anderson received the B.S and M.S. degrees from Brigham Young University and the Ph.D. degree from Georgia Institute of Technology (Georgia Tech) in 1993, 1994, and 1999, respectively.

He is currently an associate professor in the School of Electrical and Computer Engineering at Georgia Tech. Dr. Anderson’s research interests include audio and psycho-acoustics, signal processing in the context of human auditory characteristics, and the real-time application of such techniques using both analog and digital hardware. His research has included the development of a digital hearing aid algorithm that has now been made into a successful commercial product.

Dr. Anderson was awarded the National Science Foundation CAREER Award for excellence as a young educator and researcher in 2004 and the Presidential Early Career Award for Scientists and Engineers in the same year. He has over 120 technical publications and 5 patents/patents pending. Dr. Anderson is a senior member of the IEEE, and a member the Acoustical Society of America, American Society for Engineering Education, and Tau Beta Pi. He has been actively involved in the development and promotion of computer enhanced education and other education programs.